1. Field of the Invention
The present invention relates to an image sensor, and more particularly, to a CMOS image sensor and method for fabricating the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for reducing leakage current of a photodiode in a manner of configuring a triangle shaped a photodiode area to minimize an interface contact with STI shallow trench isolation (STI) or annealing in presence of deuterium to remove dangling bonds from an interface contact with oxide.
2. Discussion of the Related Art
Generally, an image sensor is a semiconductor device that converts an optical image to an electric signal. Image sensors can be classified as a charge coupled device (CCD) using a metal-oxide-metal (MOS) capacitor and a complementary MOS (CMOS) image sensor using MOS transistors.
In a CCD image sensor, a plurality of MOS capacitors are arranged close to one another to transfer and store electric charge carriers. In a CMOS image sensor, a plurality of MOS transistors corresponding to the number of pixels are fabricated by according to CMOS technology using a control circuit and a signal processing circuit as peripheral circuits and a switching system that detects outputs step by step using the MOS transistors is utilized.
The CCD has a complicated drive system, consumes large amounts of power, a complicated fabricating process having too many masks, and is difficult to implement into one-chip due to the difficulty in implementing a signal processing circuit within a CCD chip.
The CMOS image sensor processes an image by providing a photodiode and MOS transistors within a unit pixel and detecting signals sequentially with a switching system. The CMOS image sensor adopts the CMOS fabrication technology and its fabrication process needs about 20 masks, as compared to the CCD process that needs at least 30˜40 masks. Moreover, the CMOS image sensor enables one-chip implementation with a signal processing circuit.
A CMOS image sensor circuit according to a related art and a photodiode of the CMOS image sensor are explained in detail below.
FIG. 1 is a layout of a unit pixel of a CMOS image sensor having three transistors and one photodiode according to the related art.
A unit pixel of an image sensor has of a rectangular type photodiode 10 for receiving light to generate photocharges, a reset transistor 11 receiving an Rx signal via its gate electrode to reset the photocharges generated from the photodiode 10, a drive transistor 12 receiving a Dx signal via its gate electrode to play a role as a source follower buffer amplifier, and a select transistor 13 playing a role in address processes. A STI (shallow trench isolation) layer 14 is formed to isolate devices.
FIG. 2 is a cross-sectional diagram of the CMOS image sensor shown in FIG. 1, which is taken along a line II-II.
A lightly-doped P type epitaxial layer (not shown) is grown on a heavily-doped P type substrate 15. A lightly-doped N type photodiode 10 and a STI layer 14 are formed on the epitaxial layer. A gate oxide layer 17 and a gate electrode 18 of the reset transistor 11 are sequentially formed on the epitaxial layer. Spacers 19 are formed on both sidewalls of the gate electrode 18, respectively.
FIG. 3 is a layout of a unit pixel of a C-MOS image sensor having four transistors and one photodiode according to a related art.
A unit pixel of an image sensor has of a rectangular type photodiode 10 for receiving light to generate photocharges, a transfer transistor 21 receiving a Tx signal via its gate electrode to transfer the photocharges generated from the photodiode 10, a reset transistor 11 receiving an Rx signal via its gate electrode to reset the photocharges, a drive transistor 12 receiving a Dx signal via its gate electrode to play a role as a source follower buffer amplifier, and a select transistor 13 playing a role in addressing. A STI layer 14 is formed to isolate devices.
FIG. 4 is a cross-sectional diagram of the CMOS image sensor shown in FIG. 3, which is taken along a cutting line IV-IV.
A lightly-doped P type epitaxial layer (not shown) is grown on a heavily-doped P type substrate 15. A lightly-doped N type photodiode 10 and a STI layer 14 are formed on the epitaxial layer. A gate oxide layer 17 and a gate electrode 18 of the transfer transistor 21 are sequentially formed on the epitaxial layer. Spacers 19 are formed on both sidewalls of the gate electrode 18, respectively. A heavily-doped N type diffusion region 25 is formed on the epitaxial layer beside the gate electrode 18.
FIG. 5 and FIG. 6 are layouts of pixel arrays of the CMOS image sensors shown in FIG. 1 and FIG. 3, respectively.
Referring to FIG. 5 and FIG. 6, unit pixels are isolated from one another by the STI layer 14. In particular, the unit pixels, as shown in FIG. 5, in the same row share a gate electrode of a select transistor 13.
FIG. 7 is a diagram of a pixel array of a CMOS image sensor according to a related art.
Green and red pixels 27 and 28 are alternately arranged in a first row. Blue and green pixels 29 and 27 are alternately arranged in a second row.
In the related art CMOS image sensor, since the photodiode has a rectangular shape, the four sides of the photodiode 10 are brought into contact with the STI layer 14. Hence, defects existing at the interface 20 between the STI 14 and photodiode 10 increase leakage current of the photodiode 10.
Moreover, in the related CMOS image sensor, since the semiconductor substrate 15 is annealed in the presence of hydrogen (hydrogen annealing process) to stabilize the interface 20 between the STI layer 14 and the photodiode 10 and the other interface 22 between the semiconductor substrate 1-5 and the gate oxide layer 17, hot electrons attributed to hot electron injection destroy Si—H bonds to increase trap generation from the interfaces 20 and 22. As such, leakage current of the photodiode 10 is increased.
Moreover, since the STI layer 14 includes a trench formed by reactive ion etch (RIE), the characteristics of the interface 20 between the STI layer 14 and the photodiode 10 are poorer than those of the other interface 22 between the semiconductor substrate 15 and the gate oxide layer 17 negatively influences the photodiode. Hence, the leakage current of the former interface 20 can be more serious than that of the latter interface 22.